350nm CMOS test-chip for architecture verification of real-time QVGA color-video segmentation at the 90nm technology node

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Authors: Takashi Morimoto Hiroshima University, Kagamiyama, Higashi-Hiroshima, Japan
Yohmei Harada Hiroshima University, Kagamiyama, Higashi-Hiroshima, Japan
Tetsushi Koide Hiroshima University, Kagamiyama, Higashi-Hiroshima, Japan
Hans Jürgen Mattausch Hiroshima University, Kagamiyama, Higashi-Hiroshima, Japan
350nm CMOS test-chip for architecture verification of real-time QVGA color-video segmentation at the 90nm technology node 2004 Article
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· Proceeding
ASP-DAC '04 Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Pages 531-532
IEEE Press Piscataway, NJ, USA ©2004
table of contents ISBN:0-7803-8175-0

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