A small-area high-performance 512-point 2-dimensional FFT single-chip processor

Full Text: PDFPDF Buy this ArticleBuy this Article
Authors: Naoto Miyamoto University of Tohoku, Aramaki, Aoba, Sendai, Japan
Leo Karnan University of Tohoku, Aramaki, Aoba, Sendai, Japan
Kazuyuki Maruo Advantest Laboratories Ltd., Matsubara, Kamiayashi, Aoba, Sendai, Japan
Koji Kotani University of Tohoku, Aramaki, Aoba, Sendai, Japan
Tadahiro Ohmi University of Tohoku, Aramaki, Aoba, Sendai, Japan
A small-area high-performance 512-point 2-dimensional FFT single-chip processor 2004 Article
Bibliometrics Data  Bibliometrics
· Downloads (6 Weeks): 1
· Downloads (12 Months): 7
· Downloads (cumulative): 209
· Citation Count: 0

Published in:
· Proceeding
ASP-DAC '04 Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Pages 537-538
IEEE Press Piscataway, NJ, USA ©2004
table of contents ISBN:0-7803-8175-0

Tools and Resources

Share:

|
feedback Feedback | Switch to single page view (no tabs)

Powered by The ACM Guide to Computing Literature


The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2013 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player
The ACM Guide to Computing Literature
All Tags
Export Formats
 
 
Save to Binder