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Thermal via placement in 3D ICs
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Authors:
Brent Goplen
University of Minnesota, Minneapolis, MN
Sachin Sapatnekar
University of Minnesota, Minneapolis, MN
Published in:
· Proceeding
ISPD '05
Proceedings of the 2005 international symposium on Physical design
Pages 167-174
ACM
New York, NY
, USA
©2005
table of contents
ISBN:1-59593-021-3
doi>
10.1145/1055137.1055171
2005 Article
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· Downloads (6 Weeks): 6
· Downloads (12 Months): 64
· Downloads (cumulative): 963
· Citation Count: 37
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Tags:
3-d ic
3-d vlsi
advanced technologies
algorithms
design
experimentation
finite element analysis
performance
placement
placement and routing
routing
temperature
thermal gradient
thermal optimization
thermal via
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