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1-V 7-mW dual-band fast-locked frequency synthesizer
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Authors:
Vikas Sharma
University of Wisconsin-Madison, Madison,WI
Chien-Liang Chen
National Taiwan University, Taipei, Taiwan
Chung-Ping Chen
University of Wisconsin-Madison, Madison,WI
Published in:
· Proceeding
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
ACM
New York, NY
, USA
©2005
table of contents
ISBN:1-59593-057-4
doi>
10.1145/1057661.1057764
2005 Article
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· Citation Count: 0
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GLSVLSI'12
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Tags:
design
frequency synthesizer
hiperlan
low-power design
miscellaneous
performance
phase noise
phase-locked loops
voltage-controlled oscillator
wlan
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