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A study of tighter lower bounds in LP relaxation based placement
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Authors:
Qingzhou (Ben) Wang
University of Illinois at Chicago, Chicago, IL
Devang Jariwala
University of Illinois at Chicago, Chicago, IL
John Lillis
University of Illinois at Chicago, Chicago, IL
Published in:
· Proceeding
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Pages 498-502
ACM
New York, NY
, USA
©2005
table of contents
ISBN:1-59593-057-4
doi>
10.1145/1057661.1057780
2005 Article
Bibliometrics
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· Citation Count: 2
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algorithms
placement and routing
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