Path delay test compaction with process variation tolerance

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Authors: Seiji Kajihara Kyushu Institute of Technology, Iizuka, Japan
Masayasu Fukunaga Kyushu Institute of Technology, Iizuka, Japan
Xiaoqing Wen Kyushu Institute of Technology, Iizuka, Japan
Toshiyuki Maeda Semiconductor Technology Academic Research Center, Yokohama, Japan
Shuji Hamada Semiconductor Technology Academic Research Center, Yokohama, Japan
Yasuo Sato Semiconductor Technology Academic Research Center, Yokohama, Japan
Path delay test compaction with process variation tolerance Published by ACM 2005 Article
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· Proceeding
DAC '05 Proceedings of the 42nd annual Design Automation Conference
Pages 845-850
ACM New York, NY, USA ©2005
table of contents ISBN:1-59593-058-2 doi>10.1145/1065579.1065802

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