A highly configurable cache for low energy embedded systems

doi:10.1145/1067915.1067921

A highly configurable cache for low energy embedded systems

Full Text:

Pdf

Buy this Article

Authors:	Chuanjun Zhang	San Diego State University, San Diego, CA
	Frank Vahid	University of California, Riverside, CA
	Walid Najjar	University of California, Riverside, CA

Published in:

· Journal

ACM Transactions on Embedded Computing Systems (TECS) TECS Homepage archive

Volume 4 Issue 2, May 2005
Pages 363 - 387
ACM New York, NY, USA
table of contents doi>10.1145/1067915.1067921

	2005 Article
Bibliometrics
· Downloads (6 Weeks): 4 · Downloads (12 Months): 72 · Downloads (cumulative): 1,043 · Citation Count: 16

Tools and Resources

Buy this Article
Request Permissions
TOC Service:
- Email
- RSS
Save to Binder
Export Formats:
- BibTeX
- EndNote
- ACM Ref

Share:

|

Tags: architecture tuning cache configurable design design styles embedded systems low energy low power memory hierarchy microprocessor performance vlsi systems

Feedback | Switch to single page view (no tabs)

**Javascript is not enabled and is required for the "tabbed view" or switch to the single page view**

Powered by

The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2013 ACM, Inc.
Terms of Usage Privacy Policy Code of Ethics Contact Us

Useful downloads:

Adobe Acrobat

QuickTime

Windows Media Player

Real Player

The ACM Guide to Computing Literature

All Tags

Export Formats

Save to Binder