Automatic generation of test sets for SBST of microprocessor IP cores

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Authors: E. Sanchez Politecnico di Torino, Torino, Italy
M. Reorda Reorda Politecnico di Torino, Torino, Italy
G. Squillero Politecnico di Torino, Torino, Italy
M. Violante Politecnico di Torino, Torino, Italy
Automatic generation of test sets for SBST of microprocessor IP cores Published by ACM 2005 Article
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· Proceeding
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
Pages 74-79
ACM New York, NY, USA ©2005
table of contents ISBN:1-59593-174-0 doi>10.1145/1081081.1081105

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