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Parallel computer ADENART—its architecture and application
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Authors:
H. Kadota
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
K. Kaneko
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
I. Okabayashi
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
T. Okamoto
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
T. Mimura
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
Y. Nakakura
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
A. Wakatani
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
M. Nakajima
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
J. Nishikawa
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
K. Zaiki
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
T. Nogi
Faculty of Engineering, Kyoto University
1991 Article
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Published in:
· Proceeding
ICS '91 Proceedings of the 5th international conference on Supercomputing
Pages 1-8
ACM
New York, NY
, USA
©1991
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ISBN:0-89791-434-1
doi>
10.1145/109025.109029
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network topology
parallel processors
super computers
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