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Resource mapping and scheduling for heterogeneous network processor systems
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Authors:
Liang Yang
Arizona State University, Tempe, AZ
Tushar Gohad
MontaVista Software, Tempe, AZ
Pavel Ghosh
Arizona State University, Tempe, AZ
Devesh Sinha
Arizona State University, Tempe, AZ
Arunabha Sen
Arizona State University, Tempe, AZ
Andrea Richa
Arizona State University, Tempe, AZ
2005 Article
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Published in:
· Proceeding
ANCS '05
Proceedings of the 2005 ACM symposium on Architecture for networking and communications systems
Pages 19 - 28
ACM
New York, NY
, USA
©2005
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ISBN:1-59593-082-5
doi>
10.1145/1095890.1095895
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Tags:
codesign
design
hw-sw partitioning
network processor
performance
performance analysis and design aids
randomized rounding
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