Performance implications of single thread migration on a chip multi-core

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Authors: Theofanis Constantinou University of Cyprus, Nicosia, Cyprus
Yiannakis Sazeides University of Cyprus, Nicosia, Cyprus
Pierre Michaud Irisa/Inria, Rennes Cedex, France
Damien Fetis Irisa/Inria, Rennes Cedex, France
Andre Seznec Irisa/Inria, Rennes Cedex, France
Performance implications of single thread migration on a chip multi-core Published by ACM 2005 Article
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ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05 Homepage archive
Volume 33 Issue 4, November 2005
Pages 80 - 91
ACM New York, NY, USA
table of contents doi>10.1145/1105734.1105745

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