A verifiable SSA program representation for aggressive compiler optimization

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Authors: Vijay S. Menon Intel Labs, Santa Clara, CA
Neal Glew Intel Labs, Santa Clara, CA
Brian R. Murphy Intel China Research Center, Beijing, China
Andrew McCreight Yale University, New Haven, CT
Tatiana Shpeisman Intel Labs, Santa Clara, CA
Ali-Reza Adl-Tabatabai Intel Labs, Santa Clara, CA
Leaf Petersen Intel Labs, Santa Clara, CA
A verifiable SSA program representation for aggressive compiler optimization Published by ACM 2006 Article
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· Proceeding
POPL '06 Conference record of the 33rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Pages 397 - 408
ACM New York, NY, USA ©2006
table of contents ISBN:1-59593-027-2 doi>10.1145/1111037.1111072
· Newsletter
ACM SIGPLAN Notices - Proceedings of the 2006 POPL Conference Homepage
Volume 41 Issue 1, January 2006
Pages 397 - 408
ACM New York, NY, USA
table of contents doi>10.1145/1111320.1111072

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