Debugging sequential circuits using Boolean satisfiability

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Authors: M. Fahim Ali Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
A. Veneris Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
A. Smith Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
S. Safarpour Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
R. Drechsler Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India
M. Abadir Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., PA, USA
Debugging sequential circuits using Boolean satisfiability 2004 Article
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ICCAD '04 Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Pages 204-209
IEEE Computer Society Washington, DC, USA ©2004
table of contents ISBN:0-7803-8702-3 doi>10.1109/ICCAD.2004.1382572

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