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M-trie: an efficient approach to on-chip logic minimization

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Authors: S. Ahmand Dept. of Comput. Sci., Texas A & M Univ., College Station, TX, USA
R. Mahapatra Dept. of Comput. Sci., Texas A & M Univ., College Station, TX, USA
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· Proceeding
ICCAD '04 Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
IEEE Computer Society Washington, DC, USA ©2004
table of contents ISBN:0-7803-8702-3 doi>10.1109/ICCAD.2004.1382613
M-trie: an efficient approach to on-chip logic minimization 2004 Article
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· Citation Count: 2


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