ACM DL

SIGN IN   SIGN UP

 
ACM Home Page ACM Digital Library Home Page

Hermes: LUT FPGA technology mapping algorithm for area minimization with optimum depth

Full Text: PDFPDF Buy this ArticleBuy this Article
Authors: M. Teslenko R. Inst. of Technol., IMIT/KTH, Kista, Sweden
E. Dubrova R. Inst. of Technol., IMIT/KTH, Kista, Sweden
Published in:
Cover Image
 
· Proceeding
ICCAD '04 Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
IEEE Computer Society Washington, DC, USA ©2004
table of contents ISBN:0-7803-8702-3 doi>10.1109/ICCAD.2004.1382676
Hermes: LUT FPGA technology mapping algorithm for area minimization with optimum depth 2004 Article
Bibliometrics Data  Bibliometrics
· Downloads (6 Weeks): 2
· Downloads (12 Months): 12
· Citation Count: 4


Tools and Resources

Share:

|
feedback Feedback | Switch to single page view (no tabs)

Powered by The ACM Guide to Computing Literature


The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2012 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player
The ACM Guide to Computing Literature
All Tags
Export Formats
 
 
Save to Binder