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Efficient use of communications between an FPGA's embedded processor and its reconfigurable logic
Authors:
Joshua Noseworthy
Mercury Computer Systems, Chelmsford, MA
Miriam Leeser
Northeastern University, Boston, MA
Published in:
· Proceeding
FPGA '06
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Pages 233-233
ACM
New York, NY
, USA
©2006
table of contents
ISBN:1-59593-292-5
doi>
10.1145/1117201.1117257
2006 Article
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· Citation Count: 2
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design
gate arrays
interconnections
microprocessors and microcomputers
performance
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