Post-compilation optimization for multiple gains with pattern matching

doi:10.1145/1117303.1117306

Post-compilation optimization for multiple gains with pattern matching

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Authors:	Rajeev Kumar	Indian Institute of Technology Kharagpur, Kharagpur, WB, India
	Amit Gupta	Indian Institute of Technology Kharagpur, Kharagpur, WB, India
	B. S. Pankaj	Indian Institute of Technology Kharagpur, Kharagpur, WB, India
	Mrinmoy Ghosh	Indian Institute of Technology Kharagpur, Kharagpur, WB, India
	P. P. Chakrabarti	Indian Institute of Technology Kharagpur, Kharagpur, WB, India

	2005 Article
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	ACM SIGPLAN Notices Homepage archive
	Volume 40 Issue 12, December 2005 ACM New York, NY, USA table of contents doi>10.1145/1117303.1117306

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Tags: algorithms compilers design instruction set fsm optimization pattern matching peephole optimization post-compilation optimization run-time environments

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