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Measurement results of within-die variations on a 90nm LUT array for speed and yield enhancement of reconfigurable devices
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Authors:
Kazuya Katsuki
Kyoto University, Kyoto, Japan
Manabu Kotani
Kyoto University, Kyoto, Japan
Kazutoshi Kobayashi
Kyoto University, Kyoto, Japan
Hidetoshi Onodera
Kyoto University, Kyoto, Japan
2006 Article
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Published in:
· Proceeding
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Pages 110 - 111
IEEE Press
Piscataway, NJ
, USA
©2006
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ISBN:0-7803-9451-8
doi>
10.1145/1118299.1118331
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design
design management
gate arrays
performance
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