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Evaluation of on-chip transmission line interconnect using wire length distribution
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Authors:
Junpei Inoue
Tokyo Institute of Technology, Midori-ku, Yokohama, Japan
Hiroyuki Ito
Tokyo Institute of Technology, Midori-ku, Yokohama, Japan
Shinichiro Gomi
Tokyo Institute of Technology, Midori-ku, Yokohama, Japan
Takanori Kyogoku
Tokyo Institute of Technology, Midori-ku, Yokohama, Japan
Takumi Uezono
Tokyo Institute of Technology, Midori-ku, Yokohama, Japan
Kenichi Okada
Tokyo Institute of Technology, Midori-ku, Yokohama, Japan
Kazuya Masu
Tokyo Institute of Technology, Midori-ku, Yokohama, Japan
2005 Article
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· Citation Count: 3
Published in:
· Proceeding
ASP-DAC '05
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Pages 133-138
ACM
New York, NY
, USA
©2005
table of contents
ISBN:0-7803-8737-6
doi>
10.1145/1120725.1120789
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