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High speed differential pulse-width control loop based on frequency-to-voltage converters
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Authors:
Hung Tien Bui
Université du Québec à Chicoutimi
Yvon Savaria
Ècole Polytechnique de Montréal
Published in:
· Proceeding
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Pages 53-56
ACM
New York, NY
, USA
©2006
table of contents
ISBN:1-59593-347-6
doi>
10.1145/1127908.1127923
2006 Article
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Tags:
design
duty cycle
frequency-to-voltage
high-speed
input/output circuits
performance
pwcl
vlsi
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