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Novel full-chip gridless routing considering double-via insertion
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Authors:
Huang-Yu Chen
National Taiwan University, Taipei, Taiwan
Mei-Fang Chiang
National Taiwan University, Taipei, Taiwan
Yao-Wen Chang
National Taiwan University, Taipei, Taiwan
Lumdo Chen
United Microelectronics Corporation, Hsinchu, Taiwan
Brian Han
United Microelectronics Corporation, Hsinchu, Taiwan
2006 Article
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· Downloads (6 Weeks): 3
· Downloads (12 Months): 17
· Downloads (cumulative): 326
· Citation Count: 11
Published in:
· Proceeding
DAC '06
Proceedings of the 43rd annual Design Automation Conference
Pages 755-760
ACM
New York, NY
, USA
©2006
table of contents
ISBN:1-59593-381-6
doi>
10.1145/1146909.1147101
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Tags:
algorithms
design
layout
manufacturability
placement and routing
redundant via insertion
reliability
routing
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