SIGN IN
SIGN UP
Parallel depth first vs. work stealing schedulers on CMP architectures
Full Text:
Pdf
Buy this Article
Authors:
Vasileios Liaskovitis
Carnegie Mellon University
Shimin Chen
Intel Research Pittsburgh
Phillip B. Gibbons
Intel Research Pittsburgh
Anastassia Ailamaki
Carnegie Mellon University
Guy E. Blelloch
Carnegie Mellon University
Babak Falsafi
Carnegie Mellon University
Limor Fix
Intel Research Pittsburgh
Nikos Hardavellas
Carnegie Mellon University
Michael Kozuch
Intel Research Pittsburgh
Todd C. Mowry
Carnegie Mellon University and Intel Research Pittsburgh
Chris Wilkerson
Intel Microprocessor Research Lab
2006 Article
Bibliometrics
· Downloads (6 Weeks): 2
· Downloads (12 Months): 34
· Downloads (cumulative): 523
· Citation Count: 1
Published in:
· Proceeding
SPAA '06
Proceedings of the eighteenth annual ACM symposium on Parallelism in algorithms and architectures
Pages 330 - 330
ACM
New York, NY
, USA
©2006
table of contents
ISBN:1-59593-452-9
doi>
10.1145/1148109.1148167
Tools and Resources
Buy this Article
Request Permissions
TOC Service:
Email
RSS
Save to Binder
Export Formats:
BibTeX
EndNote
ACM Ref
Upcoming Conference:
SPAA '13
Share:
|
Tags:
algorithms
caches
chip multiprocessors
measurement
performance
scheduling
scheduling
threads
Feedback
|
Switch to
single page view
(no tabs)
**Javascript is not enabled and is required for the "tabbed view" or switch to the
single page view
**
Powered by
The ACM Guide to Computing Literature
All Tags
Export Formats
Save to Binder