SIGN IN
SIGN UP
A 0.5-V FD-SOI twin-cell DRAM with offset-free dynamic-V
T
sense amplifiers
Full Text:
PDF
Buy this Article
Authors:
Riichiro Takemura
Hitachi Ltd., Tokyo, JAPAN
Kiyoo Itoh
Hitachi Ltd., Tokyo, JAPAN
Tomonori Sekiguchi
Hitachi Ltd., Tokyo, JAPAN
Published in:
· Proceeding
ISLPED '06
Proceedings of the 2006 international symposium on Low power electronics and design
Pages 123-126
ACM
New York, NY
, USA
©2006
table of contents
ISBN:1-59593-462-6
doi>
10.1145/1165573.1165602
2006 Article
Bibliometrics
· Downloads (6 Weeks): 1
· Downloads (12 Months): 10
· Downloads (cumulative): 150
· Citation Count: 0
Tools and Resources
Buy this Article
Request Permissions
TOC Service:
Email
RSS
Save to Binder
Export Formats:
BibTeX
EndNote
ACM Ref
Upcoming Conference:
ISLPED'13
Share:
|
Tags:
design
dynamic-
v
t
sense amplifier
fd-soi
low-voltage ram
memory technologies
performance
twin-cell dram
Feedback
|
Switch to
single page view
(no tabs)
**Javascript is not enabled and is required for the "tabbed view" or switch to the
single page view
**
Powered by
The ACM Guide to Computing Literature
All Tags
Export Formats
Save to Binder