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Dynamic thermal clock skew compensation using tunable delay buffers
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Authors:
A. Chakraborty
Politecnico di Torino, Torino, ITALY
K. Duraisami
Politecnico di Torino, Torino, ITALY
A. Sathanur
Politecnico di Torino, Torino, ITALY
P. Sithambaram
Politecnico di Torino, Torino, ITALY
L. Benini
Università di Bologna, Bologna, ITALY
A. Macii
Politecnico di Torino, Torino, ITALY
E. Macii
Politecnico di Torino, Torino, ITALY
M. Poncino
Politecnico di Torino, Torino, ITALY
2006 Article
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Published in:
· Proceeding
ISLPED '06
Proceedings of the 2006 international symposium on Low power electronics and design
Pages 162-167
ACM
New York, NY
, USA
©2006
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ISBN:1-59593-462-6
doi>
10.1145/1165573.1165612
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Tags:
algorithms
clock skew
clock tree
design
performance
performance analysis and design aids
temperature aware design methodology
tunable delay buffers
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