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A practical fast parallel routing architecture for Clos networks
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Authors:
S. Q. Zheng
University of Texas at Dallas, Richardson, TX
Ashwin Gumaste
Indian Institute of Technology, Bombay, India
Enyue Lu
Salisbury University, Salisbury, MD
Published in:
· Proceeding
ANCS '06
Proceedings of the 2006 ACM/IEEE symposium on Architecture for networking and communications systems
Pages 21 - 30
ACM
New York, NY
, USA
©2006
table of contents
ISBN:1-59593-580-0
doi>
10.1145/1185347.1185351
2006 Article
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· Citation Count: 1
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Tags:
algorithms
circuit switching
clos network
design
packet switching
parallel algorithm
parallel architecture
parallel i/o
permutation routing
pipelining
rearrangeable nonblocking
routers
strictly nonblocking
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