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Co-evolutionary high-level test synthesis
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Authors:
Soheil Aminzadeh
University of Tehran, Tehran, Iran
Saeed Safari
University of Tehran, Tehran, Iran
Published in:
· Proceeding
GLSVLSI '07
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Pages 67-72
ACM
New York, NY
, USA
©2007
table of contents
ISBN: 978-1-59593-605-9
doi>
10.1145/1228784.1228805
2007 Article
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Tags:
algorithms
co-evolutionary algorithm
design
design aids
genetic algorithm
high-level test synthesis
module binding
register allocation
reliability
reliability, testing, and fault-tolerance
scheduling
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