Transition-activity aware design of reduction-stages for parallel multipliers

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Authors: Saeeid Tahmasbi Oskuii Norwegian University of Science and Technology, Trondheim, Norway
Per Gunnar Kjeldsberg Norwegian University of Science and Technology, Trondheim, Norway
Oscar Gustafsson Linköping University, Linköping, Sweden
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· Proceeding
GLSVLSI '07 Proceedings of the 17th ACM Great Lakes symposium on VLSI
Pages 120-125
ACM New York, NY, USA ©2007
table of contents ISBN: 978-1-59593-605-9 doi>10.1145/1228784.1228817
Transition-activity aware design of reduction-stages for parallel multipliers Published by ACM 2007 Article
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