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Compiler assisted architectural exploration for coarse grained reconfigurable arrays
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Authors:
Gregory Dimitroulakos
University Of Patras, Rio-Patras, Greece
Nikos Kostaras
University Of Patras, Rio-Patras, Greece
Michalis D. Galanis
University Of Patras, Rio-Patras, Greece
Costas E. Goutis
University Of Patras, Rio-Patras, Greece
2007 Article
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Published in:
· Proceeding
GLSVLSI '07
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Pages 164-167
ACM
New York, NY
, USA
©2007
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ISBN: 978-1-59593-605-9
doi>
10.1145/1228784.1228827
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Tags:
architectural exploration
array and vector processors
coarse-grained reconfigurable arrays
design
experimentation
measurement
modulo scheduling
optimization
performance
reconfigurable computing
retargetable compilers
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