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A hardware/software framework for supporting transactional memory in a MPSoC environment
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Authors:
Cesare Ferri
Brown University, Providence, RI
Tali Moreshet
Swarthmore College, Swarthmore, PA
R. Iris Bahar
Brown University, Providence, RI
Luca Benini
University of Bologna, Bologna, Italy
Maurice Herlihy
Brown University, Providence, RI
2007 Article
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· Newsletter
ACM SIGARCH Computer Architecture News
archive
Volume 35 Issue 1, March 2007
Pages 47 - 54
ACM
New York, NY
, USA
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doi>
10.1145/1241601.1241611
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benchmarks
concurrency
design
experimentation
languages
measurement
parallelism and concurrency
performance
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