Interactive presentation: On power-profiling and pattern generation for power-safe scan tests

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Authors:	V. R. Devanathan	Texas Instruments India Pvt. Ltd., Bangalore, India
	C. P. Ravikumar	Texas Instruments India Pvt. Ltd., Bangalore, India
	V. Kamakoti	Indian Institute of Technology, Madras, India

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DATE '07 Proceedings of the conference on Design, automation and test in Europe

EDA Consortium San Jose, CA, USA ©2007
table of contents ISBN: 978-3-9810801-2-4

	2007 Article
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