ILP and heuristic techniques for system-level design on network processor architectures

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Authors: Chris Ostler Arizona State University, Tempe, AZ
Karam S. Chatha Arizona State University, Tempe, AZ
Vijay Ramamurthi Arizona State University, Tempe, AZ
Krishnan Srinivasan Sonics, Mountain View, CA
ILP and heuristic techniques for system-level design on network processor architectures Published by ACM 2007 Article
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ACM Transactions on Design Automation of Electronic Systems (TODAES) TODAES Homepage archive
Volume 12 Issue 4, September 2007
Article No. 48
ACM New York, NY, USA
table of contents doi>10.1145/1278349.1278361

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