ACM DL

SIGN IN   SIGN UP

 
ACM Home Page ACM Digital Library Home Page

Transition delay fault test pattern generation considering supply voltage noise in a SOC design

Full Text: PdfPdf Buy this ArticleBuy this Article
Authors: Nisar Ahmed University of Connecticut
Mohammad Tehranipoor University of Connecticut
Vinay Jayaram Texas Instruments, Inc., Dallas, TX
Published in:
· Proceeding
DAC '07 Proceedings of the 44th annual Design Automation Conference
ACM New York, NY, USA ©2007
table of contents ISBN: 978-1-59593-627-1 doi>10.1145/1278480.1278616
Transition delay fault test pattern generation considering supply voltage noise in a SOC design Published by ACM 2007 Article
Bibliometrics Data  Bibliometrics
· Downloads (6 Weeks): 0
· Downloads (12 Months): 18
· Citation Count: 7


Tools and Resources

Share:

|
feedback Feedback | Switch to single page view (no tabs)

Powered by The ACM Guide to Computing Literature


The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2012 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player
The ACM Guide to Computing Literature
All Tags
Export Formats
 
 
Save to Binder