ACM DL

SIGN IN   SIGN UP

 
ACM Home Page ACM Digital Library Home Page

Bus encoding schemes for minimizing delay in VLSI interconnects

Full Text: PDFPDF Buy this ArticleBuy this Article
Authors: K. S. Sainarayanan International Institute of Information Technology (IIIT): Hyderabad, HYDERABAD, India
Chittarsu Raghunandan International Institute of Information Technology (IIIT): Hyderabad, HYDERABAD, India
M. B. Srinivas International Institute of Information Technology (IIIT): Hyderabad, HYDERABAD, India
Published in:
· Proceeding
SBCCI '07 Proceedings of the 20th annual conference on Integrated circuits and systems design
ACM New York, NY, USA ©2007
table of contents ISBN: 978-1-59593-816-9 doi>10.1145/1284480.1284533
Bus encoding schemes for minimizing delay in VLSI interconnects Published by ACM 2007 Article
Bibliometrics Data  Bibliometrics
· Downloads (6 Weeks): 1
· Downloads (12 Months): 8
· Citation Count: 1


Tools and Resources

Share:

|
feedback Feedback | Switch to single page view (no tabs)

Powered by The ACM Guide to Computing Literature


The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2012 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player
The ACM Guide to Computing Literature
All Tags
Export Formats
 
 
Save to Binder