Synthesis of a novel timing-error detection architecture

Full Text: PdfPdf Buy this ArticleBuy this Article
Authors: Yu-Shih Su National Tsing-Hua University, HsinChu, Taiwan
Po-Hsien Chang National Tsing-Hua University, HsinChu, Taiwan
Shih-Chieh Chang National Tsing-Hua University, HsinChu, Taiwan
Tingting Hwang National Tsing-Hua University, HsinChu, Taiwan
Synthesis of a novel timing-error detection architecture Published by ACM 2008 Article
  • Research
  • Refereed
Bibliometrics Data  Bibliometrics
· Downloads (6 Weeks): 3
· Downloads (12 Months): 18
· Downloads (cumulative): 265
· Citation Count: 2

Published in:
Cover Image
 
· Journal
ACM Transactions on Design Automation of Electronic Systems (TODAES) TODAES Homepage archive
Volume 13 Issue 1, January 2008
Article No. 14
ACM New York, NY, USA
table of contents doi>10.1145/1297666.1297680

Tools and Resources

Share:

|
feedback Feedback | Switch to single page view (no tabs)

Powered by The ACM Guide to Computing Literature


The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2013 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player
The ACM Guide to Computing Literature
All Tags
Export Formats
 
 
Save to Binder