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Hierarchical memory system design for a heterogeneous multi-core processor
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Authors:
Jianjun Guo
National University of Defense Technology, Changsha, China
Mingche Lai
National University of Defense Technology, Changsha, China
Zhengyuan Pang
National University of Defense Technology, Changsha, China
Libo Huang
National University of Defense Technology, Changsha, China
Fangyuan Chen
National University of Defense Technology, Changsha, China
Kui Dai
National University of Defense Technology, Changsha, China
Zhiying Wang
National University of Defense Technology, Changsha, China
2008 Article
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Published in:
· Proceeding
SAC '08
Proceedings of the 2008 ACM symposium on Applied computing
Pages 1504-1508
ACM
New York, NY
, USA
©2008
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ISBN: 978-1-59593-753-7
doi>
10.1145/1363686.1364039
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design
design styles
experimentation
heterogeneous
memory
multi-core
performance
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