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A novel performance driven power gating based on distributed sleep transistor network
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Authors:
Liangpeng Guo
Tsinghua University, Beijing, China
Yici Cai
Tsinghua University, Beijing, China
Qiang Zhou
Tsinghua University, Beijing, China
Le Kang
Tsinghua University, Beijing, China
Xianlong Hong
Tsinghua University, Beijing, China
2008 Article
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Published in:
· Proceeding
GLSVLSI '08
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Pages 255-260
ACM
New York, NY
, USA
©2008
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ISBN: 978-1-59593-999-9
doi>
10.1145/1366110.1366173
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Tags:
algorithms
design
layout
performance
physical design
placement and routing
power-gating
sleep transistors
verification
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