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On efficient generation of instruction sequences to test for delay defects in a processor

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Authors: Sankar Gurumurthy University of Texas, Austin, TX, USA
Ramtilak Vemu University of Texas, Austin, TX, USA
Jacob A. Abraham University of Texas, Austin, TX, USA
Suriyaprakash Natarajan Intel Corporation, Santa Clara, CA, USA
On efficient generation of instruction sequences to test for delay defects in a processor Published by ACM 2008 Article
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GLSVLSI '08 Proceedings of the 18th ACM Great Lakes symposium on VLSI
ACM New York, NY, USA ©2008
table of contents ISBN: 978-1-59593-999-9 doi>10.1145/1366110.1366178

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