SIGN IN
SIGN UP
Intel® Turbo Memory: Nonvolatile disk caches in the storage hierarchy of mainstream computer systems
Full Text:
Pdf
Buy this Article
Authors:
Jeanna Matthews
Intel Corporation, Santa Clara, CA
Sanjeev Trika
Intel Corporation, Santa Clara, CA
Debra Hensgen
Intel Corporation, Santa Clara, CA
Rick Coulson
Intel Corporation, Santa Clara, CA
Knut Grimsrud
Intel Corporation, Santa Clara, CA
2008 Article
Research
Refereed
Bibliometrics
· Downloads (6 Weeks): 12
· Downloads (12 Months): 93
· Downloads (cumulative): 1,199
· Citation Count: 15
Published in:
· Journal
ACM Transactions on Storage (TOS)
TOS Homepage
archive
Volume 4 Issue 2, May 2008
Article No. 4
ACM
New York, NY
, USA
table of contents
doi>
10.1145/1367829.1367830
Tools and Resources
Buy this Article
Request Permissions
TOC Service:
Email
RSS
Save to Binder
Export Formats:
BibTeX
EndNote
ACM Ref
Share:
|
Tags:
algorithms
disk cache
input/output devices
nand
nonvolatile memory
performance
solid-state disk
write-back
Feedback
|
Switch to
single page view
(no tabs)
**Javascript is not enabled and is required for the "tabbed view" or switch to the
single page view
**
Powered by
The ACM Guide to Computing Literature
All Tags
Export Formats
Save to Binder