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A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications
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Authors:
Chanik Park
Samsung Electronics, Hwasung-City, Korea
Wonmoon Cheon
Samsung Electronics, Hwasung-City, Korea
Jeonguk Kang
Samsung Electronics, Hwasung-City, Korea
Kangho Roh
Samsung Electronics, Hwasung-City, Korea
Wonhee Cho
Samsung Electronics, Hwasung-City, Korea
Jin-Soo Kim
Korea Advanced Institute of Science and Technology, Daejeon, Korea
2008 Article
Research
Refereed
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ACM Transactions on Embedded Computing Systems (TECS)
TECS Homepage
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Volume 7 Issue 4, July 2008
Article No. 38
ACM
New York, NY
, USA
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doi>
10.1145/1376804.1376806
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Tags:
algorithms
design
design styles
flash memory
ftl
input/output devices
performance
performance analysis
reconfigurable architecture
storage management
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