An 8x8 run-time reconfigurable FPGA embedded in a SoC

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Authors: Sumanta Chaudhuri GET-ENST, Paris, France
Sylvain Guilley GET-ENST, Paris, France
Florent Flament GET-ENST, Paris, France
Philippe Hoogvorst GET-ENST, Paris, France
Jean-Luc Danger GET-ENST, Paris, France
An 8x8 run-time reconfigurable FPGA embedded in a SoC Published by ACM 2008 Article
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· Proceeding
DAC '08 Proceedings of the 45th annual Design Automation Conference
Pages 120-125
ACM New York, NY, USA ©2008
table of contents ISBN: 978-1-60558-115-6 doi>10.1145/1391469.1391500

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