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Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts
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Authors:
Swarup Mohalik
General Motors India Science Lab, Bangalore, India
A. C. Rajeev
General Motors India Science Lab, Bangalore, India
Manoj G. Dixit
General Motors India Science Lab, Bangalore, India
S. Ramesh
General Motors India Science Lab, Bangalore, India
P. Vijay Suman
Tata Institute of Fundamental Research, Mumbai, India
Paritosh K. Pandya
Tata Institute of Fundamental Research, Mumbai, India
Shengbing Jiang
General Motors R&D, Warren, MI
2008 Article
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Published in:
· Proceeding
DAC '08
Proceedings of the 45th annual Design Automation Conference
Pages 296-299
ACM
New York, NY
, USA
©2008
table of contents
ISBN: 978-1-60558-115-6
doi>
10.1145/1391469.1391544
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Tags:
clock drifts
design
end-to-end latency
model checking
performance
special-purpose and application-based systems
task chain
timed automata
verification
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