Fault-tolerance in FPGA's through CRC voting

doi:10.1145/1404371.1404424

Fault-tolerance in FPGA's through CRC voting

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Authors:	Helano Castro	LESC - UFC, Fortaleza, Brazil
	Alexandre Augusto Coelho	LESC - UFC, Fortaleza, Brazil
	Ricardo Jardel Silveira	LESC - UFC, Fortaleza, Brazil

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	· Proceeding
	SBCCI '08 Proceedings of the 21st annual symposium on Integrated circuits and system design
	ACM New York, NY, USA ©2008 table of contents ISBN: 978-1-60558-231-3 doi>10.1145/1404371.1404424

	2008 Article
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Tags: cyclic redundancy check design experimentation fault tolerance fpga measurement partial reconfiguration reliability reliability, testing, and fault-tolerance theory verification

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