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Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
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Authors:
Henry Wong
University of British Columbia, Vancouver, BC, Canada
Anne Bracy
Intel Corporation, Santa Clara, CA, USA
Ethan Schuchman
Intel Corporation, Santa Clara, CA, USA
Tor M. Aamodt
University of British Columbia, Vancouver, BC, Canada
Jamison D. Collins
Intel Corporation, Santa Clara, CA, USA
Perry H. Wang
Intel Corporation, Santa Clara, CA, USA
Gautham Chinya
Intel Corporation, Santa Clara, CA, USA
Ankur Khandelwal Groen
Intel Corporation, Santa Clara, CA, USA
Hong Jiang
Intel Corporation, Santa Clara, CA, USA
Hong Wang
Intel Corporation, Santa Clara, CA, USA
2008 Article
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Published in:
· Proceeding
PACT '08
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Pages 52-61
ACM
New York, NY
, USA
©2008
table of contents
ISBN: 978-1-60558-282-5
doi>
10.1145/1454115.1454125
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Tags:
chip multiprocessor
design
heterogeneous
heterogeneous systems
ia32
on-chip integration
performance
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