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Meeting points: using thread criticality to adapt multicore hardware to parallel regions
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Authors:
Qiong Cai
Intel Barcelona Research Center, Barcelona, Spain
José González
Intel Barcelona Research Center, Barcelona, Spain
Ryan Rakvic
United States Naval Academy, Annapolis, Maryland, USA
Grigorios Magklis
Intel Barcelona Research Center, Barcelona, Spain
Pedro Chaparro
Intel Barcelona Research Center, Barcelona, Spain
Antonio González
Intel Barcelona Research Center, Barcelona, Spain
2008 Article
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Published in:
· Proceeding
PACT '08
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Pages 240-249
ACM
New York, NY
, USA
©2008
table of contents
ISBN: 978-1-60558-282-5
doi>
10.1145/1454115.1454149
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PACT '13
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Tags:
critical threads
design
energy-aware
low-power
meeting point thread characterization
microarchitecture
multi-threaded application
multiple data stream architectures
performance
thread balancing
thread delaying
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