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Automatic generation of a parallel tile processing unit for algorithms with non-affine array references

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Authors: Rosilde Corvino CNRS, GIPSA-lab, Grenoble, France
Stephane Mancini CNRS, GIPSA-lab, Grenoble, France
Roberto Guizzetti STMicroelectronics, Crolles, France
Published in:
· Proceeding
IFMT '08 Proceedings of the 1st international forum on Next-generation multicore/manycore technologies
ACM New York, NY, USA ©2008
table of contents ISBN: 978-1-60558-407-2 doi>10.1145/1463768.1463783
Automatic generation of a parallel tile processing unit for algorithms with non-affine array references Published by ACM 2008 Article
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