Combined circuit architecture for computing normal basis and montgomery multiplications over GF(2 m )

Combined circuit architecture for computing normal basis and montgomery multiplications over GF(2^m)

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Authors:	Chin-Chin Chen	Chang Gung University, Taoyuan, Taoyuan County, Taiwan (R.O.C.)
	Chiou-Yng Lee	Lunghwa University of Science and Technology, Guishan, Taoyuan County, Taiwan, R.O.C.
	Erl-Huei Lu	Chang Gung University, Kwei-Shan, Tao-Yuan, Taiwan, R.O.C.

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· Proceeding

Mobility '08 Proceedings of the International Conference on Mobile Technology, Applications, and Systems

ACM New York, NY, USA ©2008
table of contents ISBN: 978-1-60558-089-0 doi>10.1145/1506270.1506329

	2008 Article
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Tags: algorithms bit-parallel systolic multiplier design general hankel matrix-vector miscellaneous montgomery normal bases theory