Scalable don't-care-based logic optimization and resynthesis

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Authors: Alan Mishchenko UC Berkeley, Berkeley, USA
Robert Brayton UC Berkeley, Berkeley, USA
Jie-Hong Roland Jiang National Taiwan University, Taipei, Taiwan Roc
Stephen Jang Xilinx Inc., San Jose, USA
Scalable don't-care-based logic optimization and resynthesis Published by ACM 2009 Article
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· Proceeding
FPGA '09 Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Pages 151-160
ACM New York, NY, USA ©2009
table of contents ISBN: 978-1-60558-410-2 doi>10.1145/1508128.1508152

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