Wirelength modeling for homogeneous and heterogeneous FPGA architectural development

doi:10.1145/1508128.1508156

Wirelength modeling for homogeneous and heterogeneous FPGA architectural development

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Authors:	Alastair M. Smith	Imperial College London, London, United Kingdom
	Steven J.E. Wilton	University of British Columbia, Vancouver, BC, Canada
	Joydip Das	University of British Columbia, Vancouver, BC, Canada

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	· Proceeding
	FPGA '09 Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
	ACM New York, NY, USA ©2009 table of contents ISBN: 978-1-60558-410-2 doi>10.1145/1508128.1508156

	2009 Article
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Tags: architecture design design fpga fpga modeling gate arrays theory wirelength estimation

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