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Implementation of a genetic algorithm on a virtex-ii pro FPGA
Authors:
Michalis Vavouras
Technical University of Crete, Chania, Greece
Kyprianos Papadimitriou
Technical University of Crete, Chania, Greece
Ioannis Papaefstathiou
Technical University of Crete, Chania, Greece
Published in:
· Proceeding
FPGA '09
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Pages 287-287
ACM
New York, NY
, USA
©2009
table of contents
ISBN: 978-1-60558-410-2
doi>
10.1145/1508128.1508206
2009 Article
Poster
Bibliometrics
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· Citation Count: 3
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Tags:
algorithms
algorithms implemented in hardware
complexity measures
design
fitness functions
fpga
genetic algorithm
multiplier blocks
performance
performance measures
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