A low-overhead fault tolerance scheme for TSV-based 3D network on chip links

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Authors: Igor Loi University of Bologna, Bologna, Italy
Subhasish Mitra Stanford University, California
Thomas H. Lee Stanford University, California
Shinobu Fujita Toshiba, San Jose, CA
Luca Benini University of Bologna, Bologna, Italy
A low-overhead fault tolerance scheme for TSV-based 3D network on chip links 2008 Article
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· Proceeding
ICCAD '08 Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Pages 598-602
IEEE Press Piscataway, NJ, USA ©2008
table of contents ISBN: 978-1-4244-2820-5

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